1. Field of the Invention
The invention relates to a chip structure. More particularly, the invention relates to a chip structure having a redistribution layer.
2. Description of Related Art
With the development of integrated circuits, working frequencies of chips become higher and higher (i.e., electronic signals are transmitted faster and faster), and thereby, the quality of the electronic signals is most important for data to be transmitted smoothly. In chip structure design field, the meander line layout routing method is adopted most of the time to perform equal length design control. As such, physical lengths of the electronic signal traces in the chip are almost identical, and that transmission quality of the electronic signals (i.e., performing timing control) is further enhanced. Nevertheless, the meander line layout routing method may be limited by the size or area of a chip, and redistribution layer may become relatively complicated.
Therefore, how to further enhance the quality of high-speed transmission of the electronic signals through trace design has become an important issue nowadays.